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Nombre de documents trouvés : 85 documents
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Power-Aware Test Pattern Generation for At-Speed LOS Testing
Bosio A., Dilillo L., Girard P., Todri A., Virazel A., Miyase K., Wen X.
ATS'11: IEEE Asian Test Symposium, Special Session on "Power-Aware Testing"
, Inde [lirmm-00651917 - version 1]
Failure Analysis and Test Solutions for Low-Power SRAMs
Zordan L., Bosio A., Dilillo L., Girard P., Todri A., Virazel A., Badereddine N.
ATS'11: IEEE Asian Test Symposium, Special Session on "Memory BIST Advances for Nanoscale Technologies"
, Inde [lirmm-00651911 - version 1]
Effective Launch-to-Capture Power Reduction for LOS Scheme with Adjacent-Probability-Based X-Filling
Miyase K., Uchinodan Y., Enokimoto K., Yamato Y., Wen X., Kajihara S., Wu F., Dilillo L., Bosio A., Girard P. et al
ATS'11: Asian Test Symposium
, Inde [lirmm-00651247 - version 1]
A Hybrid Fault Tolerant Architecture for Robustness Improvement of Digital Circuits Parity Prediction Synthesis for Nano-Electronic Gate Designs
Tran A. D., Virazel A., Bosio A., Dilillo L., Girard P., Pravossoudovitch S., Wunderlich H.-J.
ATS'11: IEEE Asian Test Symposium
, Inde [lirmm-00651238 - version 1]
Error Resilient Infrastructure for Data Transfer in a Distributed Neutron Detector
Dilillo L., Bosio A., Valka M., Girard P., Pravossoudovitch S., Virazel A.
DFT'11: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems
, Canada [lirmm-00651226 - version 1]
On Using Address Scrambling to Implement Defect Tolerance in SRAMs
Alves Fonseca R., Dilillo L., Bosio A., Girard P., Pravossoudovitch S., Virazel A., Badereddine N.
ITC'11: IEEE International Test Conference
, États-Unis [lirmm-00647773 - version 1]
Power Supply Noise and Ground Bounce Aware Pattern Generation for Delay Testing
Todri A., Bosio A., Dilillo L., Girard P., Pravossoudovitch S., Virazel A.
NEWCAS'11: IEEE International NEWCAS Conference
, France [lirmm-00647815 - version 1]
Mapping Test Power to Functional Power through Smart X-Filling for LOS Scheme
Wu F., Dilillo L., Bosio A., Girard P., Pravossoudovitch S., Virazel A., Tehranipoor M., Miyase K., Wen X., Ahmed N.
LPonTR'11: IEEE International Workshop on the Impact of Low Power on Test and Reliability
, Norvège [lirmm-00651905 - version 1]
Simultaneous Power and Thermal Integrity Analysis for 3D Integrated Systems
Todri A., Bosio A., Dilillo L., Girard P., Pravossoudovitch S., Virazel A.
LPonTR'11: IEEE International Workshop on the Impact of Low Power on Test and Reliability
, Norvège [lirmm-00651802 - version 1]
Robust Structure for Data Collection and Transfer in a Distributed SRAM Based Neutron Test Bench
Dilillo L., Bosio A., Girard P., Pravossoudovitch S., Virazel A.
Workshop on Dependability Issues in Deep-Submicron Technologies
, Norvège [lirmm-00651796 - version 1]
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L'URL de cette page est :
http://hal-lirmm.ccsd.cnrs.fr/aut/Alberto Bosio/
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