Delay testing Hardware security Fault modeling Crosstalk Monitoring VLSI SEU Through-silicon vias Countermeasures MEMS Noise Testability CMOS Memory device Field programmable gate arrays Variability Computer architecture Estimation Flip-flops Atmospheric neutrons Magnetic tunneling Memory Power consumption Transistors Libraries Radiation Fault attacks RSA Low power Design Simulation Automatic test pattern generation Electromagnetic Analysis Accelerometer Design space exploration DPA Memory test Power demand Sensors Low-power design Thermal sensor Security Integrated circuit modeling CMOS integrated circuits Logic testing Single Event Upset Core-cell Transient faults Fiabilité Voltage Multiple cell upset MCU Testing Switches Clocks Test SRAM Integrated circuit design Robustness Cryptography Hardware Trojan Integrated circuit testing DFT FPGA Single event upset SEU Memories Cross-section Heavy ions Cross section Random access memory Modeling Fault injection Heating Circuit faults BIST Failure analysis Spintronics MRAM Calibration Integrated circuit interconnections SoC Delays Analytical models Reliability Hardware Microprocessors SER Neutrons Accelerometers ATPG Cryptographie Logic gates Diagnostic AES Embedded systems Soft errors Resistive-open defects Fault tolerance Circuit testing Silicon Neutron