P. Pavan, R. Bez, P. Olivo, and E. Zanoni, Flash memory cells-an overview, Proc. of the IEEE, pp.1248-1271, 1997.
DOI : 10.1109/5.622505

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=

O. Ginez, J. Daga, M. Combe, P. Girard, C. Landrault et al., An Overview of Failure Mechanisms in Embedded Flash Memories, 24th IEEE VLSI Test Symposium, pp.108-113, 2006.
DOI : 10.1109/VTS.2006.19

URL : https://hal.archives-ouvertes.fr/lirmm-00102761

M. G. Mohammad and K. K. Saluja, Simulating program disturb faults in flash memories using spice compatible electrical model, IEEE Transactions on Electron Devices, vol.50, issue.11, pp.2286-2291, 2003.
DOI : 10.1109/TED.2003.816546

A. J. Van-de-goor, Testing Semiconductor Memories, Theory and Practice, 1998.

A. J. Van-de-goor and I. B. Tlili, March tests for word-oriented memories, Proceedings Design, Automation and Test in Europe, pp.501-509, 1998.
DOI : 10.1109/DATE.1998.655905

J. Daga, Test and repair of embedded flash memories, Proceedings. International Test Conference, p.1219, 2002.
DOI : 10.1109/TEST.2002.1041922

J. Daga, Embedded EEPROM Speed Optimization Using System Power Supply Resources, Proc. of PATMOS, Santorini, pp.381-391, 2004.
DOI : 10.1007/978-3-540-30205-6_40

R. Barth, Selective optimization of test for embedded flash memory, Proceedings. International Test Conference, p.1222, 2002.
DOI : 10.1109/TEST.2002.1041925

J. Agin, Overcoming test challenges presented by embedded flash memory, IEEE/CPMT/SEMI 28th International Electronics Manufacturing Technology Symposium, 2003. IEMT 2003., pp.197-200, 2003.
DOI : 10.1109/IEMT.2003.1225899