Scan Based Side Channel Attack on Dedicated Hardware Implementations of Data Encryption Standard, International Test Conference Secure Scan: A Design-for-Test Architecture for Crypto Chips, Design Automation Conference, pp.339-344, 2004. ,
Scan Design and Secure Chip, IEEE International On-Line Testing Symposium pp, pp.219-226, 2004. ,
Test Control for Secure Scan Designs, European Test Symposium, 2005. ,