H. Abelson, D. Allen, D. Coore, C. Hanson, G. Homsy et al., Amorphous computing, Communications of the ACM, vol.43, issue.5, pp.74-82, 2000.
DOI : 10.1145/332833.332842

L. Adleman, Molecular computation of solutions to combinatorial problems, Science, vol.266, issue.5187, 1994.
DOI : 10.1126/science.7973651

J. Ban?atreban?, D. Ban?atre, M. Le, and . Etayer, Gamma and the chemical reaction model : Ten years after, Coordination Programming: Mechanisms, Models and Semantics, pp.1-39, 1996.

G. Berry and G. Gonthier, The Esterel synchronous programming language: design, semantics, implementation, Science of Computer Programming, vol.19, issue.2, pp.87-152, 1992.
DOI : 10.1016/0167-6423(92)90005-V

URL : https://hal.archives-ouvertes.fr/inria-00075711

W. Blume, R. Eigenmann, K. Faigin, J. Grout, J. Hoeflinger et al., Parallel programming with Polaris, Computer, vol.29, issue.12, pp.78-82, 1996.
DOI : 10.1109/2.546612

F. Bodin, T. Kisuk, P. Knijnenburg, M. O. Boyle, and E. Rohou, Iterative compilation in a non-linear optimisation space, Workshop on Profile and Feedback-Directed Compilation at PACT, 1998.
URL : https://hal.archives-ouvertes.fr/inria-00475919

J. M. Cardoso and H. C. Neto, Fast hardware compilation of behaviors into an FPGA-based dynamic reconfigurable computing system, Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387), pp.150-153, 1999.
DOI : 10.1109/SBCCI.1999.803109

E. Caspi, M. Chu, R. Huang, J. Yeh, J. Wawrzynek et al., Stream Computations Organized for Reconfigurable Execution (SCORE), FPL, pp.605-614, 2000.
DOI : 10.1007/3-540-44614-1_65

L. Chen, S. Dropsho, and D. H. Albonesi, Dynamic data dependence tracking and its application to branch prediction, Proceedings of Figure 26: Neural network automaton the 9th International Symposium on High-Performance Computer Architecture, pp.65-77, 2003.

J. Collard, D. Barthou, and P. Feautrier, Fuzzy array dataflow analysis, ppopp, pp.92-102, 1995.

M. Conrad, On design principles for a molecular computer, Communications of the ACM, vol.28, issue.5, pp.464-480, 1985.
DOI : 10.1145/3532.3533

Z. Cvetanovic and D. Bhandarkar, Performance characterization of the Alpha 21164 microprocessor using TP and SPEC workloads, Proceedings. Second International Symposium on High-Performance Computer Architecture, pp.270-280, 1996.
DOI : 10.1109/HPCA.1996.501192

A. Dandalis and V. K. Prasanna, Run-time performance optimization of an FPGA-based deduction engine for SAT solvers, ACM Transactions on Design Automation of Electronic Systems, vol.7, issue.4, pp.547-562, 2002.
DOI : 10.1145/605440.605444

A. Dehon, Reconfigurable Architectures for General-Purpose Computing, 1996.

A. Dehon, Very Large Scale Spatial Computing, Third International Conference on Unconventional Models of Computation, pp.27-37, 2002.
DOI : 10.1007/3-540-45833-6_3

A. Dehon, The density advantage of configurable computing, Computer, vol.33, issue.4, pp.41-49, 2000.
DOI : 10.1109/2.839320

D. Deutsch and R. Jozsa, Rapid Solution of Problems by Quantum Computation, Proceedings of the Royal Society of, pp.553-558, 1992.
DOI : 10.1098/rspa.1992.0167

. F. Jr, R. M. Carvalho, R. D. Lima, and . Lins, Coordinating functional processes with Haskell#, Proceedings of the 2002 ACM symposium on Applied computing, pp.393-400, 2002.

P. Fradet and D. L. Métayer, Structured Gamma, Science of Computer Programming, vol.31, issue.2-3, pp.263-289, 1998.
DOI : 10.1016/S0167-6423(97)00023-3

T. Gautier, P. L. Guernic, and L. Bernard, SIGNAL: A declarative language for synchronous programming of real-time systems, Computer Science, pp.257-277, 1987.
DOI : 10.1007/3-540-18317-5_15

URL : https://hal.archives-ouvertes.fr/inria-00075791

S. Ghosh, M. Martonosi, and S. Malik, Cache miss equations, Proceedings of the 11th international conference on Supercomputing , ICS '97, pp.317-324, 1997.
DOI : 10.1145/263580.263657

P. N. Glaskowsky, Microprocessor report, Network Processors Mature, 2001.

S. C. Goldstein and M. Budiu, Nanofabrics: spatial computing using molecular electronics, Proceedings of the 28th annual international symposium on Computer architecture, pp.178-191, 2001.

F. Gruau, Process of translation and conception of neural networks, based on a logical description of the target problem, us patent en 93 158 92, december 30, 1993.

F. Gruau, Automatic Definition of Modular Neural Networks, Adaptive Behavior, vol.3, issue.2, pp.151-183, 1995.
DOI : 10.1177/105971239400300202

F. Gruau, Modular genetic neural networks for 6-Legged locomotion, Artifical Evolution, pp.201-219, 1995.
DOI : 10.1007/3-540-61108-8_39

F. Gruau and P. Malbos, The Blob: A Basic Topological Concept for ???Hardware-Free??? Distributed Computation, Unconventional Models of Computation (UMC'02), pp.151-163, 2002.
DOI : 10.1007/3-540-45833-6_13

URL : https://hal.archives-ouvertes.fr/lirmm-00268600

F. Gruau and G. Moszkowski, Time-efficient self-reproduction on a 2-d cellular automaton, 1st International Workshop on Biologically inspired Approaches To Advanced Information Technology, 2004.

F. Gruau, J. Ratajszczak, and G. Wiber, A neural compiler, Theoretical Computer Science, vol.141, issue.1-2, pp.1-52, 1995.
DOI : 10.1016/0304-3975(94)00200-3

F. Gruau and J. T. Tromp, CELLULAR GRAVITY, Centrum voor Wiskunde en Informatica (CWI), p.10, 1999.
DOI : 10.1142/S0129626400000354

N. Halbwachs, P. Caspi, P. Raymond, and D. Pilaud, The synchronous data flow programming language LUSTRE, Proceedings of the IEEE, pp.1305-1320, 1991.
DOI : 10.1109/5.97300

C. Hankin, D. L. Métayer, and D. Sands, Refining multiset transformers, Theoretical Computer Science, vol.192, issue.2, pp.233-258, 1998.
DOI : 10.1016/S0304-3975(97)00151-5

T. H. Heil, Z. Smith, and J. E. Smith, Improving branch predictors by correlating on data values, MICRO-32. Proceedings of the 32nd Annual ACM/IEEE International Symposium on Microarchitecture, pp.28-37, 1999.
DOI : 10.1109/MICRO.1999.809440

J. W. Klop, Term rewriting systems, Handbook of Logic in Computer Science, 1992.

H. T. Kung and C. E. Leiserson, Systolic array for VLSI Introduction to VLSI systems, 1980.

J. Mazoyer, Computations on one-dimensional cellular automata, Annals of Mathematics and Artificial Intelligence, vol.9, issue.1, pp.285-309, 1996.
DOI : 10.1007/BF02127801

J. , M. Bluegene, and /. Supercomputer, Memory models for the, 2003.

R. Nagarajan, K. Sankaralingam, D. Burger, and S. W. Keckler, A design space evaluation of grid processor architectures, Proceedings. 34th ACM/IEEE International Symposium on Microarchitecture. MICRO-34, pp.40-51, 2001.
DOI : 10.1109/MICRO.2001.991104

A. Narayanan, S. Zorbalas-john, R. Koza, W. Banzhaf, K. Chellapilla et al., DNA algorithms for computing shortest paths, Genetic Programming 1998: Proceedings of the Third Annual Conference, pp.718-724, 1998.

B. Nitzberg and V. Lo, Distributed shared memory: a survey of issues and algorithms, IEEE Computer, pp.52-60, 1991.
DOI : 10.1109/2.84877

G. M. Papadopoulos and D. E. Culler, Monsoon: an explicit token-store architecture, Proceedings of the 17th annual international symposium on Computer Architecture, pp.82-91, 1990.

D. Parello, O. Temam, and J. Verdun, On Increasing Architecture Awareness in Program Optimizations to Bridge the Gap between Peak and Sustained Processor Performance - Matrix-Multiply Revisited, ACM/IEEE SC 2002 Conference (SC'02), p.31, 2002.
DOI : 10.1109/SC.2002.10054

G. Paun, Computing membranes, Journal of Computer and System Sciences, vol.1, issue.61, pp.108-143, 2000.

J. A. Rose, Y. Gao, M. Garzon, and R. C. Murphy, DNA implementation of finite-state machines, Genetic Programming 1997: Proceedings of the Second Annual Conference, pp.479-490, 1997.

E. Rotenberg, S. Bennett, and J. E. Smith, Trace cache: a low latency approach to high bandwidth instruction fetching, Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 29, pp.24-35, 1996.
DOI : 10.1109/MICRO.1996.566447

K. Sankaralingam, R. Nagarajan, H. Liu, C. Kim, J. Huh et al., Exploiting ilp, tlp, and dlp with the polymorphous TRIPS architecture, Proceedings of the 30th annual international symposium on Computer architecture, pp.422-433, 2003.

V. Sarkar, Partitioning and scheduling parallel programs for multiprocessors, 1989.

G. Sassatelli, L. Torres, P. Benoit, T. Gil, C. Diou et al., Higly scalable dynamically reconfigurable systollic ring-architecture for DSP application, Design Automation and Test in Europe Conference and Exhibition, 2002.

H. Sharangpani and K. Arora, Itanium processor microarchitecture, IEEE Micro, vol.20, issue.5, pp.24-43, 2000.
DOI : 10.1109/40.877948

P. W. Shor, Algorithms for quantum computation: discrete logarithms and factoring, Proceedings 35th Annual Symposium on Foundations of Computer Science, pp.124-134, 1994.
DOI : 10.1109/SFCS.1994.365700

M. Sipper, Co-evolving non-uniform cellular automata to perform computations, Physica D: Nonlinear Phenomena, vol.92, issue.3-4, pp.193-208, 1996.
DOI : 10.1016/0167-2789(95)00286-3

R. Stadler, S. Ami, M. Forshaw, and C. Joachim, molecular transistors, Nanotechnology, vol.12, issue.3, pp.350-357, 2001.
DOI : 10.1088/0957-4484/12/3/324

A. Terechko, E. L. Thenaff, M. Garg, and J. Van-eijndhoven, Inter-cluster communication models for clustered VLIW processors, The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings., pp.354-364, 2003.
DOI : 10.1109/HPCA.2003.1183552

W. Thies, M. Karczmarek, and S. P. Amarasinghe, StreamIt: A Language for Streaming Applications, Computational Complexity, pp.179-196, 2002.
DOI : 10.1007/3-540-45937-5_14

C. D. Thompson, The VLSI complexity of sorting, IEEE Transactions on Computers, issue.12, pp.321171-1184, 1983.

T. Toffoli, T. Toffoli, and T. Bach, Programmable matter methods, Future Generation Computer Systems, vol.16, issue.2-3, pp.187-201, 1999.
DOI : 10.1016/S0167-739X(99)00046-1

D. M. Tullsen, S. J. Eggers, and H. M. Levy, Simultaneous multithreading: maximizing on-chip parallelism, 25 years of the international symposia on Computer architecture, pp.533-544, 1998.

A. M. Turing, The chemical basis of morphogenesis, Phil. Trans. Roy. Soc. of London, Series B: Biological Sciences, issue.237, pp.37-72, 1952.

P. M. Vitanyi, Locality, communication, and interconnect length in multi-computers, SIAM Journal of computing, 1988.

J. Wahle, L. Neubert, J. Esser, and M. Schreckenberg, A cellular automaton traffic flow model for online simulation of traffic, Parallel Computing, vol.27, issue.5, pp.719-735, 2001.
DOI : 10.1016/S0167-8191(00)00085-5

Z. A. Ye, A. Moshovos, S. Hauck, and P. Banerjee, Chimaera: a high-performance architecture with a tightly-coupled reconfigurable functional unit, Proceedings of the 27th annual international symposium on Computer architecture, pp.225-235, 2000.