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Journal Articles International Journal of High Performance Systems Architecture (IJHPSA) Year : 2007

High-Performance Hardware Operators for Polynomial Evaluation

Arnaud Tisserand

Abstract

This paper presents some recent works on hardware evaluation of functions. A method for the automatic generation of high-performance arithmetic operators based on polynomial approximations is described. It deals with the bit-level representation of the polynomial coefficients, the intermediate computations width, the approximation and the rounding errors. The generated operators are small, fast and numerically validated at design time. Some examples have been implemented on FPGAs.
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Dates and versions

lirmm-00140930 , version 1 (10-04-2007)

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Arnaud Tisserand. High-Performance Hardware Operators for Polynomial Evaluation. International Journal of High Performance Systems Architecture (IJHPSA), 2007, 1 (1), pp.14-23. ⟨10.1504/IJHPSA.2007.013288⟩. ⟨lirmm-00140930⟩
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