HS Scale: A Run-Time Adaptable MP-SoC Architecture - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier
Conference Papers Year : 2007

HS Scale: A Run-Time Adaptable MP-SoC Architecture

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Micro and nanotechnologies/Microelectronics

Martine Peridier  : Connect in order to contact the contributor

https://hal-lirmm.ccsd.cnrs.fr/lirmm-00179482

Submitted on : Monday, October 15, 2007-3:53:05 PM

Last modification on : Friday, March 24, 2023-2:52:49 PM

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lirmm-00179482 , version 1 (15-10-2007)

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  • HAL Id : lirmm-00179482 , version 1

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Nicolas Saint-Jean, Camille Jalier, Gilles Sassatelli, Pascal Benoit, Lionel Torres, et al.. HS Scale: A Run-Time Adaptable MP-SoC Architecture. ReCoSoC'07: International Workshop on Reconfigurable Communication Centric System-On-Chips, Jun 2007, Montpellier, France. pp.CDROM. ⟨lirmm-00179482⟩

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