On the Use of LVTPNP in ESD Protection Structures - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier
Conference Papers Year : 2007

On the Use of LVTPNP in ESD Protection Structures

Abstract

In this paper, design aspects, protection capabilities and applications of Low-Voltage-Triggered bipolar PNP in comparison with grounded-gate NMOS protection are presented. Experimental results are obtained in an embedded 0.18 μm salicided CMOS process.

Domains

Micro and nanotechnologies/Microelectronics

Florence Azais  : Connect in order to contact the contributor

https://hal-lirmm.ccsd.cnrs.fr/lirmm-00199246

Submitted on : Tuesday, December 18, 2007-4:47:40 PM

Last modification on : Thursday, June 22, 2023-10:38:42 AM

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Dates and versions

lirmm-00199246 , version 1 (18-12-2007)

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  • HAL Id : lirmm-00199246 , version 1

Cite

Antoine Rivière, Philippe Coll, David Bernard, Pascal Nouet, Florence Azaïs. On the Use of LVTPNP in ESD Protection Structures. IEW'07: International Electrostatic Discharge Workshop, May 2007, Lake Tahoe, CA, United States. ⟨lirmm-00199246⟩

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CNRS SYSMIC LIRMM LIRMM_MIC MIC MIPS UNIV-MONTPELLIER
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