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Book Sections Year : 2002

On-Chip Generator of a Saw-Tooth Test Stimulus for ADC BIST

Abstract

In the context of analog BIST for A-to-D converters, this paper presents an implementation of an on-chip ramp generator. It is demonstrated that the proposed original adaptive scheme allows the internal generation of a highly saw-tooth signal with a very precise control of the signal amplitude. In addition, the implementation of the adaptive ramp generator exhibits a very low silicon area.
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Dates and versions

lirmm-00268477 , version 1 (04-10-2022)

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Florence Azaïs, Serge Bernard, Yves Bertrand, Michel Renovell. On-Chip Generator of a Saw-Tooth Test Stimulus for ADC BIST. SOC Design Methodologies, 90, Kluwer Academic Publishers, pp.425-436, 2002, IFIP — The International Federation for Information Processing, 978-1-4757-6530-4. ⟨10.1007/978-0-387-35597-9_36⟩. ⟨lirmm-00268477⟩
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