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Conference Papers Year : 2004

Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability

Abstract

SoCs became reality: an increasing number of products powered by this type of circuits hits the market. Reduced power consumption, increased performance are some of the usually stated benefits. Besides approaches aiming at enabling system level exploration for multiple million gates designs, like the SystemC initiative, choosing the right IP core, or the right set of parameters among those available is not straightforward. In this article we first present a generic model for digital signal processing architectures. Several metrics, later referred as Remanence and Operative Density are presented in this paper. The methodology is illustrated through a case study.
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Dates and versions

lirmm-00269656 , version 1 (01-10-2018)

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  • HAL Id : lirmm-00269656 , version 1

Cite

Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, et al.. Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability. SAMOS 2004 - 4th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, Jul 2004, Samos, Greece. pp.128-137. ⟨lirmm-00269656⟩
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