Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability

Abstract : SoCs became reality: an increasing number of products powered by this type of circuits hits the market. Reduced power consumption, increased performance are some of the usually stated benefits. Besides approaches aiming at enabling system level exploration for multiple million gates designs, like the SystemC initiative, choosing the right IP core, or the right set of parameters among those available is not straightforward. In this article we first present a generic model for digital signal processing architectures. Several metrics, later referred as Remanence and Operative Density are presented in this paper. The methodology is illustrated through a case study.
Complete list of metadatas

Cited literature [8 references]  Display  Hide  Download

https://hal-lirmm.ccsd.cnrs.fr/lirmm-00269656
Contributor : Christine Carvalho de Matos <>
Submitted on : Monday, October 1, 2018 - 10:15:01 PM
Last modification on : Tuesday, October 2, 2018 - 1:06:38 AM
Long-term archiving on: Wednesday, January 2, 2019 - 3:40:07 PM

File

2003-WS-14.pdf
Publisher files allowed on an open archive

Identifiers

  • HAL Id : lirmm-00269656, version 1

Citation

Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, et al.. Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability. Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), Jul 2003, Samos, Greece. pp.128-137. ⟨lirmm-00269656⟩

Share

Metrics

Record views

203

Files downloads

83