Testing Semiconductor Memories: theory and practice, 1991. ,
Static and Dynamic Behavior of Memory Cell Array Opens and Shorts in Embedded DRAMs, DATE Europe, pp.496-503, 2001. ,
Importance of dynamic faults for new SRAM technologies, The Eighth IEEE European Test Workshop, 2003. Proceedings., pp.29-34, 2003. ,
DOI : 10.1109/ETW.2003.1231665
A Realistic Fault Model and Test Algorithms for Satic Random Acces Memory, IEEE Transaction on Computer-Aided Design, issue.9 6, 1990. ,
Analysis of a Deceptive Destructive Read Memory fault Model and Recommended Testing, 1996. ,
A March Test for Functional Faults in Semiconductor Random Access Memories, IEEE Transactions on Computers, vol.30, issue.12, pp.30-42, 1981. ,
DOI : 10.1109/TC.1981.1675739
Testing static and dynamic faults in random access memories, Proceedings 20th IEEE VLSI Test Symposium (VTS 2002), p.pp, 2002. ,
DOI : 10.1109/VTS.2002.1011170
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.80.7289
New March Tests for Unlinked Dynamic Memory Faults, ITC 2005, IEEE International Test Conference, 2005. ,
Functional memory faults: a formal notation and a taxonomy, Proceedings 18th IEEE VLSI Test Symposium, pp.281-289, 2000. ,
DOI : 10.1109/VTEST.2000.843856
Leakage Read Fault in Nanoscale SRAM: Analysis, Test and Diagnosis, IEEE International Design and Test Workshop, issue.11, 2006. ,
URL : https://hal.archives-ouvertes.fr/lirmm-00137603
Slow Write Driver Faults in 65nm SRAM Technology: Analysis and March Test Solution, 2007 Design, Automation & Test in Europe Conference & Exhibition, 2007. ,
DOI : 10.1109/DATE.2007.364647
URL : https://hal.archives-ouvertes.fr/lirmm-00187037
Dynamic Two-Cell Incorrect Read Fault Due to Resistive-Open Defects in the Sense Amplifiers of SRAMs, 12th IEEE European Test Symposium (ETS'07), pp.97-102, 2007. ,
DOI : 10.1109/ETS.2007.19
URL : https://hal.archives-ouvertes.fr/lirmm-00158116
Defect-oriented dynamic fault models for embedded-SRAMs, The Eighth IEEE European Test Workshop, 2003. Proceedings., pp.23-27, 2003. ,
DOI : 10.1109/ETW.2003.1231664
URL : https://hal.archives-ouvertes.fr/lirmm-00269526
Data Retention Fault in SRAM Memories: Analysis and Detection Procedures, 23rd IEEE VLSI Test Symposium (VTS'05), pp.183-188, 2005. ,
DOI : 10.1109/VTS.2005.37
URL : https://hal.archives-ouvertes.fr/lirmm-00105995
March iC-: An Improved Version of March C- for ADOFs Detection, 22nd IEEE VLSI Test Symposium, 2004. Proceedings., pp.129-134, 2004. ,
DOI : 10.1109/VTEST.2004.1299236
URL : https://hal.archives-ouvertes.fr/lirmm-00108772
Open defects in CMOS RAM address decoders, IEEE Design & Test of Computers, vol.14, issue.2, pp.26-33, 1997. ,
DOI : 10.1109/54.587738
Integration of Nonclassical Faults in Standard March Tests, Records of the IEEE Int. Workshop on Memory Tech., Design and Testing, pp.91-96, 1998. ,
Dynamic read destructive fault in embedded-SRAMs: analysis and march test solution, Proceedings. Ninth IEEE European Test Symposium, 2004. ETS 2004., pp.140-145, 2004. ,
DOI : 10.1109/ETSYM.2004.1347645
Specification and design of a new memory fault simulator, Proceedings of the 11th Asian Test Symposium, 2002. (ATS '02)., pp.92-97, 2002. ,
DOI : 10.1109/ATS.2002.1181693