Built-In Self-Test of Global Interconnects of Field Programmable Analog Arrays

Abstract : Strategies for the test of Field Programmable Analog Arrays (FPAAs) have been devised based on testing separately their main three components: configurable analog blocks, I/O pads and interconnection network. In this work, a scheme for testing the interconnection network, in particular the global wiring, is presented. As long as analog wiring is considered, catastrophic faults at the switches and wires are considered, as well as parametric capacitive or resistive defects in interconnects. Similarly to FPGAs, critical path search is based on a graph model, so that known algorithms are reused, yielding a minimum number of Test Configurations. Then, a near-zero area overhead BIST procedure is proposed, in which Analog Built-in Block Observers are implemented as oscillators and integrators, respectively, generating test stimuli and analyzing output responses, using internal configurable resources of the FPAA.
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Article dans une revue
Microelectronics Journal, Elsevier, 2005, 36 (12), pp.1112-1123
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00367974
Contributeur : Florence Azais <>
Soumis le : vendredi 13 mars 2009 - 10:14:59
Dernière modification le : jeudi 11 janvier 2018 - 06:27:19

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  • HAL Id : lirmm-00367974, version 1

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Antonio Andrade, Gustavo Vieira, Tiago Balen, Marcelo Lubaszewski, Florence Azaïs, et al.. Built-In Self-Test of Global Interconnects of Field Programmable Analog Arrays. Microelectronics Journal, Elsevier, 2005, 36 (12), pp.1112-1123. 〈lirmm-00367974〉

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