A Multi-Converter DFT Technique for Complex SIP: Concepts and Validation
Abstract
This paper presents a new technique called “Analog Network of Converters” that allows to test a set of ADCs and DACs embedded in a complex circuit as SiP and SoC. It presents an experimental validation of this new concept that permits to reduce drastically the testing time and requires only a low cost digital ATE.
Origin | Files produced by the author(s) |
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