Parallel Test of Identical Cores Using Test Elevators in 3D Circuits - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier
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Parallel Test of Identical Cores Using Test Elevators in 3D Circuits

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Dates et versions

lirmm-00537857 , version 1 (19-11-2010)

Identifiants

  • HAL Id : lirmm-00537857 , version 1

Citer

Alberto Bosio, Giorgio Di Natale. Parallel Test of Identical Cores Using Test Elevators in 3D Circuits. 3D-Test: Testing Three-Dimensional Stacked Integrated Circuits, Nov 2010, Austin, TX, United States. IEEE, 1st International Workshop on Testing Three-Dimensional Stacked Integrated Circuits, 2010. ⟨lirmm-00537857⟩
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