Conference Papers Year : 2011

Optimized March Test Flow for Detecting Memory Faults in SRAM Devices Under Bit Line Coupling

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Micro and nanotechnologies/Microelectronics

Martine Peridier  : Connect in order to contact the contributor

https://hal-lirmm.ccsd.cnrs.fr/lirmm-00592182

Submitted on : Wednesday, May 11, 2011-3:19:36 PM

Last modification on : Friday, March 24, 2023-2:52:54 PM

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lirmm-00592182 , version 1 (11-05-2011)

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  • HAL Id : lirmm-00592182 , version 1

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Leonardo B. Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, et al.. Optimized March Test Flow for Detecting Memory Faults in SRAM Devices Under Bit Line Coupling. DDECS'11: 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits ans Systems, Netherlands. pp.353-358. ⟨lirmm-00592182⟩

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