J. Gambino, F. Chen, and J. He, Copper interconnect technology for the 32nm node and beyond Proceeding of IEEE Custom Integrated Circuits Conference, CICC'09, pp.141-148, 2009.

V. De and S. Borkar, Technology and design challenges for low power and high performance, Proceedings of the 1999 international symposium on Low power electronics and design , ISLPED '99, pp.163-168, 1999.
DOI : 10.1145/313817.313908

H. Shah, P. Shiu, B. Bell, M. Aldredge, N. Sopory et al., Repeater Insertion and Wire Sizing Optimization for Throughput- Centric VLSI Global Interconnects Effects of Inductance on the Propagation Delay and Repeater Insertion in VLSI Circuits, Proc. ICCAD, pp.280-284195, 2000.