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Countermeasures Against Physical Attacks in FPGAs

Benoit Badrignans 1, 2 Florian Devic 1, 2 Lionel Torres 3 Gilles Sassatelli 3 Pascal Benoit 3
1 NETHEOS - NETHEOS
2 LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
3 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : This chapter presents a set of countermeasures against physical attacks specifically dedicated to FPGA. Countermeasures as masking, hiding, are first discussed. Then we give a set of information and an overview on different logic style designed to be robust against SCA. The main objective herein is to compare these techniques and show that they can be suitable and implementable for FPGA components. A comparison of different logic style will conclude this chapter.
Keywords : Hardware Implementation Register File Side Channel Attack Pass Transistor Logic Style
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00809330
Contributor : Lionel Torres Connect in order to contact the contributor
Submitted on : Friday, March 18, 2022 - 12:33:10 PM
Last modification on : Friday, March 18, 2022 - 12:35:42 PM

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LIRMM | CNRS | SYSMIC | LIRMM_MIC | MIC | MIPS | UNIV-MONTPELLIER | AXESECULIRMM

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Benoit Badrignans, Florian Devic, Lionel Torres, Gilles Sassatelli, Pascal Benoit. Countermeasures Against Physical Attacks in FPGAs. Security Trends for FPGAS
From Secured to Secure Reconfigurable Systems, Springer, pp.73-100, 2011, 978-94-007-1337-6. ⟨10.1007/978-94-007-1338-3_4⟩. ⟨lirmm-00809330⟩

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