W. Xiaoqing, B. E. Madison, and U. S. , He joined SynTest Technologies, Inc., U.S.A., in 1998, and served as its CTO until 2003 he joined the Kyushu Institute of Technology, Iizuka, Japan, where he is currently a Professor. He was the Program Committee Co-Chair of the Sixteenth IEEE Asian Test Symposium and the Eighth IEEE Workshop on RTL and High Level Testing. Currently, he is on numerous program committees He is the Associate Editor for Journal of Computer Science and Technology) and the Information Processing Society Transactions on System LSI Design Methodology. He co-authored and coedited two books: VLSI Test Principles and Architectures: Design for Testability His research interests include design, test, and diagnosis of integrated circuits, IEEE International Test Conf. (ITC), Design, Automation, and Test in Europe (DATE), IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTS), European Test Symposium (ETS), and Asian Test Symposium (ATS)) and Power-Aware Testing and Test Strategies for Low Power Devices He currently holds 23 U.S. Patents and 5 Japan Patents in logic built-in self-test (BIST), test compression, and low-power test generation. He received the 2008 IEICE-ISS Best Paper Award. He is a member of the IEICE, the IPSJ, and the REAJ, 1986.