A single built-in sensor to check pull-up and pull-down CMOS networks against transient faults

This work proposes a novel built-in current sensor for detecting transient faults of short and long duration as well as multiple faults in combinational and sequential logic. Unlike prior similar strategies, which are formed by pairs of PMOS and NMOS sensors, the proposed scheme is a single sensor connected to PMOS and NMOS bulks of the monitored logic. In comparison with existing transient-fault mitigation techniques, the paper presents very competitive results that indicate no performance penalty, and overheads of only 26 % in power consumption and 23 % in area.

Keywords

Transient faults Built-in current sensors Concurrent detection Fault attacks Fault tolerance Security Soft errors

Domains

Micro and nanotechnologies/Microelectronics

Fichier principal

abstract_2_Possamai_Bastos_2013-04-08_23_41_52_paper-radecs-20130408-rpb.pdf (1.01 Mo)

Origin	Files produced by the author(s)

Marie-Lise Flottes : Connect in order to contact the contributor

https://hal-lirmm.ccsd.cnrs.fr/lirmm-00968621

Submitted on : Wednesday, October 5, 2016-3:50:24 PM

Last modification on : Tuesday, August 27, 2024-12:47:14 PM

Long-term archiving on : Friday, January 6, 2017-1:55:07 PM

Dates and versions

lirmm-00968621 , version 1 (05-10-2016)

Identifiers

HAL Id : lirmm-00968621 , version 1
DOI : 10.1109/PATMOS.2013.6662169

Cite

Rodrigo Possamai Bastos, Frank Sill Torres, Jean-Max Dutertre, Marie-Lise Flottes, Giorgio Di Natale, et al.. A single built-in sensor to check pull-up and pull-down CMOS networks against transient faults. PATMOS: Power and Timing Modeling, Optimization and Simulation, Sep 2013, Karlsruhe, Germany. pp.157-163, ⟨10.1109/PATMOS.2013.6662169⟩. ⟨lirmm-00968621⟩

Export

BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite

Collections

UGA CNRS TIMA LIRMM TEST LIRMM_MIC MIC MIPS UNIV-MONTPELLIER AXESECULIRMM

430 View

383 Download