This paper presents a multi-level fault simulator for digital circuits. Single and multiple transient phenomena are examined at low level in order to model accurately single/multiple event transients at logic level. Multi-level simulation is used for precision of electrical modeling and the conciseness of the coarse grain gate-level modeling. This simulator handles natural and maliciously-induced transient faults, allowing evaluating the robustness of dependable circuits as well as countermeasures against ionizing-induced fault attacks on secure circuits.