Design Exploration for next Generation High-Performance Manycore On-chip Systems: Application to big.LITTLE Architectures - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Conference Papers Year : 2015

Design Exploration for next Generation High-Performance Manycore On-chip Systems: Application to big.LITTLE Architectures

Abstract

Next generation embedded systems will massively adopt on-chip manycore architectures to provide both performance and energy-efficiency. This trend will definitely establish the convergence of embedded computing and high-performance computing. In such a context, one major design challenge will concern the choice of adequate architecture parameters given system requirements. Moreover, it will affect the way applications can suitably exploit architecture resources for an efficient execution. This paper deals with manycore on-chip system design exploration by using via simulation. It presents an approach enabling one to study central design parameters in an accurate and cost-effective manner. This approach is illustrated through the design exploration for ARM big.LITTLE heterogeneous multicore technology in the gem5 framework.
Fichier principal
Vignette du fichier
isvlsi2015.pdf (390.75 Ko) Télécharger le fichier
Origin : Files produced by the author(s)
Loading...

Dates and versions

lirmm-01255927 , version 1 (14-01-2016)

Identifiers

Cite

Anastasiia Butko, Abdoulaye Gamatié, Gilles Sassatelli, Lionel Torres, Michel Robert. Design Exploration for next Generation High-Performance Manycore On-chip Systems: Application to big.LITTLE Architectures. ISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.551-556, ⟨10.1109/ISVLSI.2015.28⟩. ⟨lirmm-01255927⟩
251 View
964 Download

Altmetric

Share

Gmail Facebook X LinkedIn More