Design-for-Diagnosis Architecture for Power Switches

Abstract : Power-gating techniques have been adopted so far to reduce the static power consumption of an Integrated Circuit (IC). Power-gating is usually implemented by means of several power switches. Manufacturing defects affecting power switches can lead to increase the actual static power consumption and, in the worst case, they can completely isolate a functional block in the IC. Thus, efficient test and diagnosis solutions are needed. In this paper we propose a Design-for-Diagnosis architecture for Power Switches. The proposed approach has been validated through SPICE simulations on ITC'99 benchmark circuits as well as on industrial test case.
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Communication dans un congrès
DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2015, Belgrade, Serbia. pp.43-48, 2015, 〈10.1109/DDECS.2015.18〉
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-01272684
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Soumis le : mardi 17 mai 2016 - 15:34:26
Dernière modification le : jeudi 28 juin 2018 - 18:44:04

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Miroslav Valka, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, et al.. Design-for-Diagnosis Architecture for Power Switches. DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2015, Belgrade, Serbia. pp.43-48, 2015, 〈10.1109/DDECS.2015.18〉. 〈lirmm-01272684〉

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