Scan-chain intra-cell defects grading
Abstract
With the continuous scaling down of the transistor size, the so-called intra-cell defects are more and more frequent. Several works analyze the impact of intra-cell defects w.r.t. the test quality. However, to the best of our knowledge, none of them target intra-cell defects affecting scan flip-flops. This paper presents an evaluation of the effectiveness of the ATPG test patterns in terms of intra-cell defect coverage affecting scan flip-flops. The experimental results show that a meaningful test solution has to be developed to improve the overall defect coverage for the scan chain testing.