Design and performance parameters of an ultra-low voltage, single supply 32bit processor implemented in 28nm FDSOI technology

Abstract : This work presents a single-supply SPARC 32b V8 microprocessor designed with Ultra Low Voltage (ULV) adapted standard cells and memories, aiming at low energy operation and stand by power. The microprocessor, equipped with 10 Transistors ULV bitcell 8KB SRAM cache, has been fabricated in Fully Depleted Silicon On Insulator (FDSOI) 28nm technology. A comparative analysis with similar implementations has been provided highlighting the performance gain and power savings that are achieved by our design methodology and implementation technology. Wafer-level tests showed that our ULV adapted microprocessor has an operating range that is functional down to 0.33V and that the ULV able cache can save from 30% to 62% energy.
Type de document :
Communication dans un congrès
ISQED: International Symposium on Quality Electronic Design, Apr 2015, Santa Clara, United States. Quality Electronic Design (ISQED), 2015 16th International Symposium on, pp.366-370, 2015, 〈10.1109/ISQED.2015.7085453〉
Liste complète des métadonnées

https://hal-lirmm.ccsd.cnrs.fr/lirmm-01272913
Contributeur : <>
Soumis le : mardi 17 mai 2016 - 15:29:43
Dernière modification le : mercredi 7 mars 2018 - 11:56:02

Identifiants

Collections

Citation

Sylvain Clerc, Fady Abouzeid, Darayus Adil Patel, Jean-Marc Daveau, Cyril Bottoni, et al.. Design and performance parameters of an ultra-low voltage, single supply 32bit processor implemented in 28nm FDSOI technology. ISQED: International Symposium on Quality Electronic Design, Apr 2015, Santa Clara, United States. Quality Electronic Design (ISQED), 2015 16th International Symposium on, pp.366-370, 2015, 〈10.1109/ISQED.2015.7085453〉. 〈lirmm-01272913〉

Partager

Métriques

Consultations de la notice

237