An efficient hybrid power modeling approach for accurate gate-level power estimation - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier
Conference Papers Year : 2015

An efficient hybrid power modeling approach for accurate gate-level power estimation

Abstract

This paper presents a hybrid power modeling approach based on an efficient library characterization methodology and an effective power estimation flow to accurately assess gate-level power consumption in a faster way. As a case study, we apply the proposed approach on 28nm Fully-Depleted Silicon On Insulator technology. Index Terms—FDSOI Technology, Hybrid Power Model, Library Characterization, Power Estimation Technique.
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Dates and versions

lirmm-01354745 , version 1 (19-08-2016)

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Alejandro Nocua, Arnaud Virazel, Alberto Bosio, Patrick Girard, Cyril Chevalier. An efficient hybrid power modeling approach for accurate gate-level power estimation. ICM: International Conference on Microelectronics, Dec 2015, Casablanca, Morocco. pp.17-20, ⟨10.1109/ICM.2015.7437976⟩. ⟨lirmm-01354745⟩
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