Full-System Simulation of big.LITTLE Multicore Architecture for Performance and Energy Exploration - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Conference Papers Year : 2016

Full-System Simulation of big.LITTLE Multicore Architecture for Performance and Energy Exploration

Abstract

Single-ISA heterogeneous multicore processors have gained increasing popularity with the introduction of recent technologies such as ARM big.LITTLE. These processors offer increased energy efficiency through combining low power in- order cores with high performance out-of-order cores. Efficiently exploiting this attractive feature requires careful management so as to meet the demands of targeted applications. In this paper, we explore the design of those architectures based on the ARM big.LITTLE technology by modeling performance and power in gem5 and McPAT frameworks. Our models are validated w.r.t. the Samsung Exynos 5 Octa (5422) chip. We show average errors of 20% in execution time, 13% for power consumption and 24% for energy-to-solution.
Fichier principal
Vignette du fichier
mcsoc2016.pdf (211.91 Ko) Télécharger le fichier
Origin Files produced by the author(s)

Dates and versions

lirmm-01418745 , version 1 (16-12-2016)

Identifiers

Cite

Anastasiia Butko, Florent Bruguier, Abdoulaye Gamatié, Gilles Sassatelli, David Novo, et al.. Full-System Simulation of big.LITTLE Multicore Architecture for Performance and Energy Exploration. MCSoC: Embedded Multicore/Many-core Systems-on-Chip, Sep 2016, Lyon, France. pp.201-208, ⟨10.1109/MCSoC.2016.20⟩. ⟨lirmm-01418745⟩
330 View
1218 Download

Altmetric

Share

Gmail Mastodon Facebook X LinkedIn More