A Survey of Hardware Trojan Taxonomy and Detection, IEEE Design & Test of Computers, vol.27, issue.1, pp.10-25, 2010. ,
DOI : 10.1109/MDT.2010.7
Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain, Proceedings of the IEEE, pp.1207-1228, 2014. ,
DOI : 10.1109/JPROC.2014.2332291
Hardware Trojan Attacks: Threat Analysis and Countermeasures, Proceedings of the IEEE, vol.102, issue.8, pp.1229-1247, 2014. ,
DOI : 10.1109/JPROC.2014.2334493
URL : http://doi.org/10.1109/jproc.2014.2334493
A survey of hardware Trojan threat and defense, Integration, the VLSI Journal, vol.55, 2016. ,
DOI : 10.1016/j.vlsi.2016.01.004
Hardware Trojans, ACM Transactions on Design Automation of Electronic Systems, vol.22, issue.1, pp.1-23, 2016. ,
DOI : 10.1145/2656075.2656077
URL : http://dl.acm.org/ft_gateway.cfm?id=2906147&type=pdf
Hardware Trojan: Threats and emerging solutions, 2009 IEEE International High Level Design Validation and Test Workshop, pp.166-171, 2009. ,
DOI : 10.1109/HLDVT.2009.5340158
Trustworthy Hardware: Trojan Detection and Design-for-Trust Challenges, IEEE Computer, pp.66-74, 2011. ,
DOI : 10.1109/MC.2010.369
Classification of hardware trojan detection techniques, 2015 Tenth International Conference on Computer Engineering & Systems (ICCES), pp.357-362, 2015. ,
DOI : 10.1109/ICCES.2015.7393075
Introduction to Hardware Trojan Detection Methods, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015, pp.770-775, 2015. ,
DOI : 10.7873/DATE.2015.1101
Regaining Trust in VLSI Design: Design-for-Trust Techniques, Proceedings of the IEEE, pp.1266-1282, 2014. ,
DOI : 10.1109/JPROC.2014.2332154
URL : http://doi.org/10.1109/jproc.2014.2332154
Detecting Malicious Inclusion in Secure Hardware: Challenges and Solutions, IEEE International Workshop on Hardware-Oriented Security and Trust (HOST'08), pp.15-19, 2008. ,
Trustworthy Hardware: Identifying and Classifying Hardware Trojans, IEEE Computer, pp.39-46, 2010. ,
DOI : 10.1109/MC.2010.299
On Reverse Engineering-Based Hardware Trojan Detection, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Sytems, pp.49-57, 2016. ,
DOI : 10.1109/tcad.2015.2488495
Trojan Detection using IC Fingerprinting, 2007 IEEE Symposium on Security and Privacy (SP '07), pp.296-310, 2007. ,
DOI : 10.1109/SP.2007.36
URL : http://isis.poly.edu/~kurt/fm/feb_22/ic_fingerp.pdf
Hardware Trojan Detection Using Path Delay Fingerprint, IEEE International Workshop on Hardware-Oriented Security and Trust (HOST'08), pp.51-57, 2008. ,
Resilient hardware Trojans detection based on path delay measurements, 2015 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pp.151-156, 2015. ,
DOI : 10.1109/HST.2015.7140254
URL : https://hal.archives-ouvertes.fr/emse-01233319
Hardware Trojan Detection by Delay and Electromagnetic Measurements, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 ,
DOI : 10.7873/DATE.2015.1103
URL : https://hal.archives-ouvertes.fr/hal-01240239
Hardware Trojan Horse Detection Using Gate-Level Characterisation, ACM/IEEE Design Automation Conference (DAC'09), pp.688-693, 2009. ,
DOI : 10.1145/1629911.1630091
URL : http://www.cs.ucla.edu/%7Emiodrag/papers/Potkonjak_DAC_2009.pdf
Hardware Trojan Detection with Linear Regression Based Gate-Level Characterisation, IEEE Asia Pacific Conference on Circuit sand Systems (APCCAS'14), pp.256-259, 2014. ,
DOI : 10.1109/apccas.2014.7032768
Towards trojan-free trusted ICs, Proceedings of the conference on Design, automation and test in Europe, DATE '08, pp.1362-1365, 2008. ,
DOI : 10.1145/1403375.1403703
New Testing Procedure for Finding Insertion Sites of Stealthy Hardware Trojans, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015, pp.776-781, 2015. ,
DOI : 10.7873/DATE.2015.1102
URL : https://hal.archives-ouvertes.fr/lirmm-01141619
Using outliers to detect stealthy hardware trojan triggering?, 2016 1st IEEE International Verification and Security Workshop (IVSW), pp.39-44, 2016. ,
DOI : 10.1109/IVSW.2016.7566609
URL : https://hal.archives-ouvertes.fr/lirmm-01347119
MERO: A Statistical Approach for Hardware Trojan Detection, International Conference on Cryptographic Hardware and Embedded Systems (CHES'09), pp.396-410, 2009. ,
DOI : 10.1007/978-3-642-04138-9_28
Improved Test Pattern Generation for Hardware Trojan Detection Using Genetic Algorithm and Boolean Satisfability, Cryptographic Hardware and Embedded Systems (CHES'15), pp.577-596, 2015. ,
DOI : 10.1007/978-3-662-48324-4_29
Hardware Trojan detection using exhaustive testing of k-bit subspaces, The 20th Asia and South Pacific Design Automation Conference, 2015. ,
DOI : 10.1109/ASPDAC.2015.7059101
Exciting FPGA cryptographic Trojans using combinatorial testing, 2015 IEEE 26th International Symposium on Software Reliability Engineering (ISSRE), 2015. ,
DOI : 10.1109/ISSRE.2015.7381800
URL : http://revistas.uptc.edu.co/revistas/index.php/ingenieria/article/download/5295/4425
Efficient triggering of Trojan hardware logic, 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), pp.200-205, 2016. ,
DOI : 10.1109/DDECS.2016.7482481
Hardware Trojan Horses in Cryptographic IP Cores, 2013 Workshop on Fault Diagnosis and Tolerance in Cryptography, pp.15-29, 2013. ,
DOI : 10.1109/FDTC.2013.15
URL : https://hal.archives-ouvertes.fr/hal-00855146
On the Effectiveness of Hardware Trojan Horse Detection via Side-Channel Analysis, Information Security Journal: A Global Perspective, pp.5-6226, 2013. ,
DOI : 10.1145/1403375.1403703
URL : https://hal.archives-ouvertes.fr/lirmm-00991362
Guided test generation for isolation and detection of embedded trojans in ics, Proceedings of the 18th ACM Great Lakes symposium on VLSI , GLSVLSI '08, pp.363-366, 2008. ,
DOI : 10.1145/1366110.1366196
A Novel Sustained Vector Technique for the Detection of Hardware Trojans, 2009 22nd International Conference on VLSI Design, pp.327-332, 2009. ,
DOI : 10.1109/VLSI.Design.2009.22
Monte Carlo based Test Pattern Generation for Harware Trojan Detection, IEEE International Conference on Dependable, Automotic and Secure Computing (DASC'13), pp.131-136, 2013. ,
DOI : 10.1109/dasc.2013.50
HARPOON: An Obfuscation-Based SoC Design Methodology for Hardware Protection, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp.1493-1502, 2009. ,
DOI : 10.1109/TCAD.2009.2028166
Security Against Hardware Trojan Attacks Using Key-Based Design Obfuscation, Journal of Electronic Testing, vol.3200, issue.3, pp.767-785, 2011. ,
DOI : 10.1007/978-3-540-30114-1_24
Linear Complementary Dual Code Improvement to Strenghten Encoded Circuits against Hardware Trojan horses, IEEE International Workshop on Hardware-Oriented Security and Trust (HOST'15), pp.82-87, 2015. ,
DOI : 10.1109/hst.2015.7140242
DSD: A Dynamic State-Deflection Method for Gate-Level Netlist Obfuscation, 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp.565-570, 2016. ,
DOI : 10.1109/ISVLSI.2016.90
Security analysis of integrated circuit camouflaging, Proceedings of the 2013 ACM SIGSAC conference on Computer & communications security, CCS '13, pp.709-720, 2013. ,
DOI : 10.1145/2508859.2516656
Threshold-Dependent Camouflaged Cells to Secure Circuits Against Reverse Engineering Attacks, 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp.443-448, 2016. ,
DOI : 10.1109/ISVLSI.2016.89
URL : http://arxiv.org/pdf/1605.00684
BISA: Built-in self-authentication for preventing hardware Trojan insertion, 2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), pp.45-50, 2013. ,
DOI : 10.1109/HST.2013.6581564
A Novel Built-In Self-Authentication Technique to Prevent Inserting Hardware Trojans, IEEE Transactions on Computer-aided Design of Integraded Circuits, pp.1778-1791, 2014. ,
DOI : 10.1109/TCAD.2014.2356453
Hardware Trust through Layout Filling: A Hardware Trojan Prevention Technique, 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp.254-259, 2016. ,
DOI : 10.1109/ISVLSI.2016.22
URL : https://hal.archives-ouvertes.fr/lirmm-01346529
Efficient and secure split manufacturing via obfuscated built-in self-authentication, 2015 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pp.14-19, 2015. ,
DOI : 10.1109/HST.2015.7140229
Facilitating side channel analysis by obfuscation for Hardware Trojan detection, 2015 10th International Design & Test Symposium (IDT), pp.129-134, 2015. ,
DOI : 10.1109/IDT.2015.7396749
URL : https://hal.archives-ouvertes.fr/hal-01391014
VITAMIN: Voltage inversion technique to ascertain malicious insertions in ICs, 2009 IEEE International Workshop on Hardware-Oriented Security and Trust, pp.104-107, 2009. ,
DOI : 10.1109/HST.2009.5224960
New design strategy for improving hardware Trojan detection and reducing Trojan activation time, 2009 IEEE International Workshop on Hardware-Oriented Security and Trust, pp.66-73, 2009. ,
DOI : 10.1109/HST.2009.5224968
URL : http://www.ece.unm.edu/~jimp/pubs/host2009_final.pdf
A Novel Technique for Improving Hardware Trojan Detection and Reducing Trojan Activation Time, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp.112-125, 2012. ,
DOI : 10.1109/TVLSI.2010.2093547
URL : http://www.ece.unm.edu/~jimp/pubs/TVLSIver5.pdf
Low overhead design for improving hardware trojan detection efficiency, NAECON 2014, IEEE National Aerospace and Electronics Conference, pp.379-383, 2014. ,
DOI : 10.1109/NAECON.2014.7045840
A low cost acceleration method for hardware trojan detection based on fan-out cone analysis, Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES '14, 2014. ,
DOI : 10.1145/2656075.2656077
Cost Efficient Acceleration of Hardware Trojan Detection through Fan-out Cone Analysis and Weighted Random Pattern Technique A New Testing Method for Hardware Trojan Detection, In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems In Procedia Technology, vol.35, issue.17, pp.792-805713, 2014. ,
Trojan Immune Circuits Using Duality, 2012 15th Euromicro Conference on Digital System Design, pp.177-184, 2012. ,
DOI : 10.1109/DSD.2012.134
On-demand transparency for improving hardware Trojan detectability, 2008 IEEE International Workshop on Hardware-Oriented Security and Trust, pp.48-50, 2008. ,
DOI : 10.1109/HST.2008.4559048
A novel hardware logic encryption technique for thwarting illegal overproduction and Hardware Trojans, 2014 IEEE 20th International On-Line Testing Symposium (IOLTS), 2014. ,
DOI : 10.1109/IOLTS.2014.6873671
URL : https://hal.archives-ouvertes.fr/lirmm-01025275
Temperature Tracking: Toward Robust Run-Time Detection of Hardware Trojans, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp.1577-1585, 2015. ,
DOI : 10.1109/TCAD.2015.2424929
Efficient Hardware Trojan Detection with Differential Cascade Voltage Switch Logic, VLSI Design, Special Issue on Advanced VLSI Architecture Design for Emerging Digital Systems, 2014.M ,
DOI : 10.1109/TIFS.2010.2096811
URL : https://doi.org/10.1155/2014/652187
Integrated Circuit Security ? New Threats and Solutions, Cyber Security and Information Intelligence Research Workshop, 2009. ,
DOI : 10.1145/1558607.1558671
Duplication Based One-to-Many Coding for Trojan HW Detection, 2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems, pp.160-166, 2010. ,
DOI : 10.1109/DFT.2010.26
URL : http://mark.bu.edu/papers/220.pdf
Duplication-based Concurrent Detection of Hardware Trojans in Integrated Circuits, Workshop on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE'16), 2016. ,
URL : https://hal.archives-ouvertes.fr/lirmm-01385551
Trends and challenges in VLSI circuit reliability, IEEE Micro, pp.14-19, 2003. ,
DOI : 10.1109/MM.2003.1225959
Self-Dual Modules in Design of Dependable Digital Devices, 2006 International Conference on Dependability of Computer Systems, 2006. ,
DOI : 10.1109/DEPCOS-RELCOMEX.2006.50
Is Manufacturing Secure?, Design, Automation & Test in Europe (DATE'15), pp.1259-1264, 2013. ,
DOI : 10.7873/date.2013.261
Applications of testability analysis: from ATPG to critical delay path tracing, International Test Conference (ITC'84), pp.705-712, 1984. ,
Hardware Trojan Detection for Gate-level ICs using Signal Correlation based Clustering, Design, Automation & Test in Europe (DATE'15), pp.471-476, 2015. ,
TeSR: A robust Temporal Self-Referencing approach for Hardware Trojan detection, 2011 IEEE International Symposium on Hardware-Oriented Security and Trust, pp.71-74, 2011. ,
DOI : 10.1109/HST.2011.5954999
Design for Autonomous Test, IEEE Transactions on Circuits and Systems, pp.1070-1079, 1981. ,
From secured logic to IP protection, Microprocessors and Microsytems, 2016. ,
DOI : 10.1016/j.micpro.2016.02.010
URL : https://hal.archives-ouvertes.fr/hal-01280195
EPIC, Proceedings of the conference on Design, automation and test in Europe, DATE '08, pp.1069-1074, 2008. ,
DOI : 10.1145/1403375.1403631
Logic encryption: A fault analysis perspective, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp.953-958, 2012. ,
DOI : 10.1109/DATE.2012.6176634
Security analysis of logic obfuscation, Proceedings of the 49th Annual Design Automation Conference on, DAC '12, pp.83-89, 2012. ,
DOI : 10.1145/2228360.2228377
Evaluating the security of logic encryption algorithms, 2015 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pp.137-143, 2015. ,
DOI : 10.1109/HST.2015.7140252
On Improving the Security of Logic Locking, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.35, issue.9, pp.1411-1424, 2016. ,
DOI : 10.1109/TCAD.2015.2511144
Mitigating SAT Attack on Logic Locking, Conference on Cryptographic Hardware and Embedded Systems (CHES'16), pp.127-146, 2016. ,
DOI : 10.1109/ICCAD.2014.7001362
SARLock: SAT attack resistant logic locking, 2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pp.236-241, 2016. ,
DOI : 10.1109/HST.2016.7495588
Neutralizing a Designfor-Hardware-Trust Technique, International Symposium on Computer Architecture & Digital Systems (CADS'13), pp.73-78, 2013. ,
DOI : 10.1109/cads.2013.6714240
Which concurrent error detection scheme to choose ?, Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159), 2000. ,
DOI : 10.1109/TEST.2000.894311
A regular fabric design methodology for applications requiring specific layout-level design rules, Microelectronics Journal, vol.45, issue.2, pp.217-225, 2014. ,
DOI : 10.1016/j.mejo.2013.11.002
URL : https://hal.archives-ouvertes.fr/lirmm-00978481
A2: Analogic Malicious Hardware TrustedRTL: Trojan Detection Methodology in Pre-Silicon Designs, IEEE Symposium on Security and Piracy (SP'16), 2016. [78] M. Banga and M.S. Hsiao IEEE International Symposium on Hardware-Oriented Security and Trust (HOST'10), pp.56-59, 2010. ,
Case study: Detecting hardware Trojans in third-party digital IP cores, 2011 IEEE International Symposium on Hardware-Oriented Security and Trust, pp.67-70, 2011. ,
DOI : 10.1109/HST.2011.5954998
Proof carrying-based information flow tracking for data secrecy protection and hardware trust, 2012 IEEE 30th VLSI Test Symposium (VTS), pp.252-257, 2012. ,
DOI : 10.1109/VTS.2012.6231062
Hardware Trojans: current challenges and approaches, IET Computers & Digital Techniques, pp.264-273, 2014. ,
DOI : 10.1049/iet-cdt.2014.0039