A Survey of Carbon Nanotube Interconnects for Energy Efficient Integrated Circuits

Abstract : This article is a review of the state-of-art carbon nanotube interconnects for Silicon application with respect to the recent literature. Amongst all the research on carbon nanotube interconnects, those discussed here cover 1) challenges with current copper interconnects, 2) process & growth of carbon nanotube interconnects compatible with back-end-of-line integration, and 3) modeling and simulation for circuit-level benchmarking and performance prediction. The focus is on the evolution of carbon nanotube interconnects from the process, theoretical modeling, and experimental characterization to on-chip interconnect applications. We provide an overview of the current advancements on carbon nanotube interconnects and also regarding the prospects for designing energy efficient integrated circuits. Each selected category is presented in an accessible manner aiming to serve as a survey and informative cornerstone on carbon nanotube interconnects relevant to students and scientists belonging to a range of fields from physics, processing to circuit design.
Type de document :
Article dans une revue
IEEE Circuits and Systems Magazine -New Series-, Institute of Electrical and Electronics Engineers, 2017, 17 (2), pp.47-62. 〈10.1109/MCAS.2017.2689538〉
Liste complète des métadonnées

https://hal-lirmm.ccsd.cnrs.fr/lirmm-01795757
Contributeur : Philippe Maurine <>
Soumis le : vendredi 18 mai 2018 - 16:52:58
Dernière modification le : lundi 11 février 2019 - 16:50:41

Lien texte intégral

Identifiants

Citation

Aida Todri-Sanial, Raphael Ramos, Hanako Okuno, Jean Dijon, Abitha Dhavamani, et al.. A Survey of Carbon Nanotube Interconnects for Energy Efficient Integrated Circuits. IEEE Circuits and Systems Magazine -New Series-, Institute of Electrical and Electronics Engineers, 2017, 17 (2), pp.47-62. 〈10.1109/MCAS.2017.2689538〉. 〈lirmm-01795757〉

Partager

Métriques

Consultations de la notice

120