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Electromigration and voltage drop aware power grid optimization for power gated ICs

Abstract : Power gating is an efficient technique for reducing leakage power by disconnecting idle blocks from power supply. Gated blocks cause changes in current densities on the grid. Even in DC conditions for some power gating configuration (PGC), current densities in some branches may increase to the extent of violating electromigration (EM) constraints. The existing DC methods optimize the grid under voltage drop (IR) and EM constraints for a single configuration of blocks. We analyze the effects of power gating and develop a grid sizing algorithm to satisfy all reliability constraints for multiple PGCs with only a small increase in area.
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-01973890
Contributor : Aida Todri-Sanial <>
Submitted on : Tuesday, January 8, 2019 - 3:03:42 PM
Last modification on : Wednesday, December 11, 2019 - 1:32:02 AM

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Aida Todri-Sanial, Shih-Chieh Chang, Malgorzata Marek-Sadowska. Electromigration and voltage drop aware power grid optimization for power gated ICs. ISLPED: International Symposium on Low Power Electronics and Design, 2007, Portland, OR, United States. ⟨10.1145/1283780.1283866⟩. ⟨lirmm-01973890⟩

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