Power-aware evaluation flowfor digital decimation filter architectures for high-speed ADCS - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier
Conference Papers Year : 2009

Power-aware evaluation flowfor digital decimation filter architectures for high-speed ADCS

David Novo
IMEC
CV
R. Fasthuber
  • Function : Author
P. Raghavan
  • Function : Author
A. Bourdoux
  • Function : Author
Min Li
L. van Der Perre
  • Function : Author
IMEC
Francky Catthoor
IMEC

Domains

Computer Science [cs]

David Novo  : Connect in order to contact the contributor

https://hal-lirmm.ccsd.cnrs.fr/lirmm-02089304

Submitted on : Wednesday, April 3, 2019-4:01:17 PM

Last modification on : Wednesday, June 12, 2024-4:04:39 PM

No file

Dates and versions

lirmm-02089304 , version 1 (03-04-2019)

Identifiers

Cite

David Novo, R. Fasthuber, P. Raghavan, A. Bourdoux, Min Li, et al.. Power-aware evaluation flowfor digital decimation filter architectures for high-speed ADCS. IEEE Workshop on Signal Processing Systems (SiPS), Oct 2009, Tampere, Finland. pp.151-156, ⟨10.1109/SIPS.2009.5336241⟩. ⟨lirmm-02089304⟩

Export

BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite

Collections

LIRMM
21 View
0 Download

Altmetric

Share

More