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M. Novaes, V. Petrucci, A. Gamatié, and F. M. Pereira, Compiler-assisted adaptive program scheduling in big.little systems. CoRR, abs/1903.07038, 2019.
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P. Péneau, Integration of emerging non volatile memory in the cache hierarchy for energyefficiency improvement. Theses, 2018.

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F. M. Pereira, G. V. Leobas, and A. Gamatié, Static prediction of silent stores, TACO, vol.15, issue.4, 2019.
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M. Poremba, T. Zhang, and Y. Xie, Nvmain 2.0: A user-friendly memory simulator to model (non-)volatile memory systems, IEEE Computer Architecture Letters, vol.14, issue.2, pp.140-143, 2015.

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P. Péneau, D. Novo, F. Bruguier, G. Sassatelli, and A. Gamatié, Performance and energy assessment of last-level cache replacement policies, 2017 First International Conference on Embedded Distributed Systems (EDiS), pp.1-6, 2017.

I. R. Quadri, A. Gamatié, P. Boulet, and J. Dekeyser, Modeling of Configurations for Embedded System Implementations in MARTE, 1st workshop on Model Based Engineering for Embedded Systems Design -Design, Automation and Test in Europe, 2010.
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S. Senni, L. Torres, G. Sassatelli, A. Gamatié, and B. Mussard, Emerging non-volatile memory technologies exploration flow for processor architecture, IEEE Computer Society Annual Symposium on VLSI, pp.460-460, 2015.
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S. Senni, L. Torres, G. Sassatelli, A. Gamatié, and B. Mussard, Exploring mram technologies for energy efficient systems-on-chip, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol.6, issue.3, pp.279-292, 2016.
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S. Senni, T. Delobelle, O. Coi, P. Peneau, L. Torres et al., Embedded systems to high performance computing using stt-mram, Design, Automation Test in Europe Conference Exhibition (DATE, pp.536-541, 2017.
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A. K. Singh, C. Leech, B. K. Reddy, B. M. Al-hashimi, and G. V. Merrett, Learning-based runtime power and energy management of multi/many-core systems: Current and future trends, J. Low Power Electronics, vol.13, issue.3, pp.310-325, 2017.

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K. A. Vardhan and Y. Srikant, Exploiting Critical Data Regions to Reduce Data Cache Energy Consumption, Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems, pp.69-78, 2014.

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H. Yu, A. Gamatié, E. Rutten, and J. Dekeyser, Safe design of high-performance embedded systems in an mde framework, Systems and Software Engineering (ISSE), A NASA Journa, vol.4, 2008.

X. Y. Zhu, M. Geilen, T. Basten, and S. Stuijk, Multiconstraint static scheduling of synchronous dataflow graphs via retiming and unfolding, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.35, issue.6, pp.905-918, 2016.

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