A Method for Trading Test Time, Area and Fault Coverage in Datapath BIST Synthesis - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier
Journal Articles Journal of Electronic Testing: : Theory and Applications Year : 2001

A Method for Trading Test Time, Area and Fault Coverage in Datapath BIST Synthesis

Abstract

This paper presents a method for deriving a BIST specification from the initial specification of datapaths. This method minimizes BIST area overhead under test time constraint while guaranteeing a user chosen fault coverage. The designer can thus explore a wide range of solutions and keep the one that best fits with design constraints. Results show great improvements over lower level techniques.

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Micro and nanotechnologies/Microelectronics
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-02288800

Submitted on : Monday, September 16, 2019-9:46:23 AM

Last modification on : Friday, March 24, 2023-2:53:12 PM

Long-term archiving on : Saturday, February 8, 2020-4:32:46 PM

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lirmm-02288800 , version 1 (16-09-2019)

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David Berthelot, Marie-Lise Flottes, Bruno Rouzeyre. A Method for Trading Test Time, Area and Fault Coverage in Datapath BIST Synthesis. Journal of Electronic Testing: : Theory and Applications, 2001, 17 (3/4), pp.331-339. ⟨10.1023/A:1012227715327⟩. ⟨lirmm-02288800⟩

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