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Design of Low-Cost Approximate CMOS Full Adders Aibin Yan b6e3179e96f0efb7d29c30ee36dc0138 mail.ustc.edu.cn 982204 1028411-982204 https://orcid.org/0000-0003-0024-987X Shaojie Wei ad4591b734a212be725e571d458c2fb4 qq.com 1161771 2579164-1161771 Zhixing Li 2578081-0 Jie Cui a90e5afdb8339ee53a7d79ba63600c24 mail.ustc.edu.cn 1083520 927882-1083520 https://orcid.org/0000-0001-7258-3418 https://orcid.org/0000-0002-8668-8402 Zhengfeng Huang f9c21cce7fbbeb9a62306520196ab2f2 139.com 982206 1028416-982206 https://orcid.org/0000-0001-8695-4478 Patrick Girard 64eced688a71c917544572f77f24aa3d lirmm.fr patrick-girard-lirmm 740458 52018-740458 https://orcid.org/0000-0003-0722-8772 Xiaoqing Wen 6db0c7bb79671ca5b04c13ea93789e8a cse.kyutech.ac.jp 1161852 249139-1161852 https://orcid.org/0000-0001-8305-604X Isabelle Gouat 01a8910ec35817770bca127295d8d38a lirmm.fr 2023-10-13 15:39:15 2025-12-02 03:18:19 2023-10-13 15:44:51 2023-05-21 2023-10-13 contributor Isabelle Gouat 01a8910ec35817770bca127295d8d38a lirmm.fr CCSD lirmm-04241285 https://hal-lirmm.ccsd.cnrs.fr/lirmm-04241285 yan:lirmm-04241285 <i>ISCAS 2023 - IEEE International Symposium on Circuits and Systems</i>, May 2023, Monterey, CA, United States. <a target="_blank" href="https://dx.doi.org/10.1109/ISCAS46773.2023.10181531">⟨10.1109/ISCAS46773.2023.10181531⟩</a> ISCAS 2023 - IEEE International Symposium on Circuits and Systems, May 2023, Monterey, CA, United States. ⟨10.1109/ISCAS46773.2023.10181531⟩ HAL Authorization CNRS - Centre national de la recherche scientifique Université de Montpellier Paul-Valéry Université Perpignan Via Domitia Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier Test and dEpendability of microelectronic integrated SysTems Université de Montpellier Publications UPVM texte intégral Université de Montpellier (2015-2021) Université de Montpellier - EPE International No Yes Yes Design of Low-Cost Approximate CMOS Full Adders Aibin Yan b6e3179e96f0efb7d29c30ee36dc0138 mail.ustc.edu.cn 982204 1028411-982204 https://orcid.org/0000-0003-0024-987X Shaojie Wei ad4591b734a212be725e571d458c2fb4 qq.com 1161771 2579164-1161771 Zhixing Li 2578081-0 Jie Cui a90e5afdb8339ee53a7d79ba63600c24 mail.ustc.edu.cn 1083520 927882-1083520 https://orcid.org/0000-0001-7258-3418 https://orcid.org/0000-0002-8668-8402 Zhengfeng Huang f9c21cce7fbbeb9a62306520196ab2f2 139.com 982206 1028416-982206 https://orcid.org/0000-0001-8695-4478 Patrick Girard 64eced688a71c917544572f77f24aa3d lirmm.fr patrick-girard-lirmm 740458 52018-740458 https://orcid.org/0000-0003-0722-8772 Xiaoqing Wen 6db0c7bb79671ca5b04c13ea93789e8a cse.kyutech.ac.jp 1161852 249139-1161852 https://orcid.org/0000-0001-8305-604X ISCAS 2023 - IEEE International Symposium on Circuits and Systems 2023-05-21 2023-05-25 Monterey, CA United States 10.1109/ISCAS46773.2023.10181531 English Approximate calculation Approximate full adder Data processing CMOS Error-tolerance Circuit design Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics Conference papers Conference papers Conference papers

Many applications have an inherent tolerance for insignificant inaccuracies. Full adders are key arithmetic functions for many error-tolerant applications. Approximate full adders are considered an efficient technique to trade off energy relative to performance and accuracy. In this paper, we propose four approximate full adders with low overhead. The proposed and the existing approximate full adders are classified into two groups according to their error distances. Simulation results show that, compared with the existing approximate full adders, in the first group, the proposed ones can reduce power-area-delay product (PADP) by 61.83%, power by 54.15%, area by 44.67%, and delay by 22.78 % on average; in the second group, the proposed ones can reduce PADP by 97.01%, power by 93.43%, area by 24.98%, and delay by 36.14% on average.

https://ror.org/01f5rdf64 Anhui University [Hefei] 1928-01-01

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