End-to-End Analog Edge AI Architecture For Scalable Energy-Efficient On-Chip Learning - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier
Preprints, Working Papers, ... Year : 2024

End-to-End Analog Edge AI Architecture For Scalable Energy-Efficient On-Chip Learning

Mohamed Watfa
Gilles Sassatelli
Alberto Garcia-Ortiz

Abstract

Equilibrium Propagation (EP) has emerged as a promising method in deep learning that leverages analog process-ing and memristive devices for efficient deep learning. However, practical challenges such as reduced accuracy in voltage variation calculations, non-ideal characteristics of memristive devices, and analog processing blocks complicate its application. Existing EP models, often idealized, overlook these issues, making them impractical for silicon-based implementations. Moreover, current implementations mainly serve as proof-of-concept architectures, falling short in solving complex problems effectively. Our study introduces and conducts a comprehensive analysis of various EP circuit implementations to identify efficient solutions for on-device training. We explore different formulations of update rules and propose hardware-aware gradient quantization and accumu-lation for batch training. Our findings show that simple update rules in current analog implementations fail on modest problems, but analog-compatible modifications can achieve performance comparable to ideal models. Furthermore, we propose a viable architecture for developing analog/mixed-signal systems capable of end-to-end training, thereby paving the way towards practical and efficient analog machine learning solutions.
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Dates and versions

lirmm-04660507 , version 1 (23-07-2024)

Identifiers

  • HAL Id : lirmm-04660507 , version 1

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Mohamed Watfa, Gilles Sassatelli, Alberto Garcia-Ortiz. End-to-End Analog Edge AI Architecture For Scalable Energy-Efficient On-Chip Learning. 2024. ⟨lirmm-04660507⟩
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