IP Protection Processor scheduling Silent stores Multicore processing Memory architecture Fog computing Lightweight cryptography IoT RSA System reliability Renewable energy DRAM Architecture Approximate Computing Gateway Resistive RAM Machine Learning Internet des Objets Approximate computing OpenMP Caches Deep Neural Networks Embedded System Transistors Adaptive systems Hardware Adaptation SoC Parallel programming languages Design Space Exploration Embedded systems Power demand Rowhammer Design methodology Memory hierarchy FPGA security Software-Defined Power Domains Modeling Deep Learning Performance Side-channel attacks SCAs MRAM Physically unclonable function Edge computing Gem5 Detection Cryptography Distributed systems Gem5 simulator Network-on-Chip Internet of Things Network-on-chip Neural networks Machine learning Simulation Memory device Blockchain Deep learning Ring oscillator Efficacité énergétique RO frequency Scheduling Performance evaluation Scalability exploration Design space exploration Generative Adversarial Network M2M Multiprocessing systems Model Compression FPGA Mitigation Power Monitoring Computer architecture Quantization Security Spintronic memory and logic Multi-threaded programs Reliability Delays Energy-efficiency Resource allocation Data Distribution Service Error analysis Monitoring Parameter exploration Magnetic RAM Decentralized network Microarchitecture Energy efficiency Hardware Accelerator BigLITTLE Privacy Hardware security Energy Education STT-MRAM Side-channel attacks Non volatile memory Multicore systems Power