BIST CMOS image sensor Silicon Machine-learning algorithms Soft error Test cost reduction Software Scan Encryption Stream Cipher Integrated circuit testing Memory Approximate computing Digital signal processing 3D integration Double-node-upset SEE SEU Fault Tolerance Test efficiency Hardware Logic gates Dynamic test Double-node upset Analog signals Clocks Circuit reliability Computer architecture OQPSK Alternate testing Dependability Radiation Effects IoT Indirect test Customer returns Protons FDSOI Diagnosis ZigBee Integrated circuits Reliability RF integrated circuits Fault injection Radiation effects Approximate Computing SRAM Security One bit acquisition Microprocessors Radiation hardening Context saving Test confidence Noise measurement Ensemble methods Hardware security Latch design Design-for-Trust 8T SRAM cell Scan Attacks Countermeasure RISC-V Power supplies Automatic test pattern generation Radiation Delays Machine Learning Combinational circuits Stuck bits JTAG Testing Intra-cell defects Safety System-on-Chip Power demand Phase noise Analog/RF integrated circuits CMOS Logic locking Transistors Recovery Test and Security Circuit faults Digital ATE Laser ATPG Test Ciphers Indirect testing 1-bit acquisition Neutrons SDRAM Data retention RF test Functional test In-Memory Computing Latch reliability Fault tolerance COTS Education Fault Injection Instrumentation Machine learning