Dynamic test Test cost reduction Transistors Automatic test pattern generation Laser fault injection Low-cost measurements SEU Integrated circuit modeling Functional approximation Fault injection Power demand SRAM Evaluation Security Integrated circuit noise Machine-learning algorithms Hardware security Design-for-Trust Soft error Fault tolerance Test and Security Digital modulation Silicon Computer architecture CMOS Test Machine Learning Microprocessors Approximate computing Latch design Functional test Instrumentation BIST 3D integration Approximate Computing Test confidence Light Encryption Scan Encryption Scan Attacks Countermeasure Integrated circuit reliability Indirect testing Software Circuit reliability EVM measurement Digital ATE Neutrons ATPG Reliability Dependability FDSOI JTAG Double-node upset RF test Fault Tolerance Ensemble methods Combinational circuits Power supplies Analog/RF integrated circuits Multiple cell upset MCU OQPSK Radiation Circuit faults Alternate testing Radiation hardening Clocks Indirect test Integrated circuits Switches Analog signals 1-bit acquisition Fault-tolerance Test efficiency Context saving SEE ZigBee Fault Injection Logic gates One bit acquisition Phase noise Flash memory Hardware Customer returns Testing Intra-cell defects COTS Education Single event upset SEU Noise measurement Digital signal processing RF integrated circuits Data retention Integrated circuit testing Diagnosis Stream Cipher Laser RISC-V Delays Memories IoT Radiation effects