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 Test and dEpendability of microelectronic integrated SysTems

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SRAM Computational modeling Intra-cell defect Microprocessors Switches SEU Fault tolerant systems Power demand Laser Functional and Structural test Fault attacks Education Clocks Hardware security Approximate computing Power consumption Noise measurement Integrated circuit interconnections MC-Oracle Flip-flops Integrated circuit reliability Fault simulation Testing Logic testing Dynamic test Test Evaluation Through-silicon vias Mathematical model FDSOI technology Hardware Trojan Detection Single event upset SEU Heating Integrated circuit modeling Reliability ATPG SER Low-cost measurements FDSOI Low power design Hardware Integrated circuit testing Soft errors Fiabilité Analog signals BIST Indirect testing Analog/RF integrated circuits Digital ATE Automatic test pattern generation Simulation Test cost reduction FDSOI Technology Integrated circuit noise Light Encryption Estimation Libraries Multiple cell upset MCU Computer architecture Memories Atmospheric neutrons Integrated circuits Protons Transistors Test and Security Test efficiency Fault diagnosis Cross section Particle detector Delays Random access memory Laser fault injection Radiation Logic gates Security Fault tolerance FRAM Transient analysis Transient faults Hardware Trojans Microprocessor chips Heavy ions Integrated circuit design One bit acquisition Alternate testing Phase noise Monitoring Circuit faults Digital signal processing COTS Databases Fault injection Power supplies 3D integration Scan Attacks Countermeasure 1-bit acquisition Diffusion model Hardware Trojan Software Design for testability