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TEST

 Test and dEpendability of microelectronic integrated SysTems

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Number of Files

128

Nomber of Notices

277

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Tags

Multiple cell upset MCU Microprocessors Test efficiency Logic testing Delays FRAM Power consumption Test Fault diagnosis Evaluation Particle detector Scan Encryption Simulation Integrated circuit design Integrated circuit testing Analog signals Monitoring Dynamic test Integrated circuit modeling Integrated circuits 1-bit acquisition Analog/RF integrated circuits Hardware Trojan FDSOI technology Test and Security Fault attacks Design for testability Fault injection Fault tolerance Libraries FDSOI Through-silicon vias Cryptography Data retention Functional and Structural test Diffusion model SRAM Diagnosis Automatic test pattern generation Computational modeling Databases Scan Attacks Countermeasure Atmospheric neutrons Random access memory Dependability Microprocessor chips Security Cross section Noise measurement Context Saving 3D integration Hardware security FDSOI Technology Test cost reduction Software Estimation Laser Circuit faults Phase noise Testing Radiation JTAG Digital ATE Protons Fault simulation Digital signal processing Transient analysis BIST ATPG Stream Cipher Flip-flops Soft errors One bit acquisition Reliability Hardware Security Switches Hardware Clocks Approximate computing Power supplies Memories COTS Logic gates Computer architecture SER Indirect testing Transient faults Integrated circuit reliability Heavy ions Single event upset SEU Alternate testing Fiabilité Education Transistors Power demand Fault tolerant systems Process variability SEU Fault Injection Encryption