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A Parallelized Way to Provide Data Encryption and Integrity Checking on a Processor-Memory Bus

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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00102783
Contributor : Christine Carvalho de Matos <>
Submitted on : Monday, October 2, 2006 - 4:17:27 PM
Last modification on : Monday, April 12, 2021 - 11:08:05 AM

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  • HAL Id : lirmm-00102783, version 1

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Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, Michel Bardouillet, et al.. A Parallelized Way to Provide Data Encryption and Integrity Checking on a Processor-Memory Bus. DAC: Design Automation Conference, Jul 2006, San Francisco, CA, United States. ⟨lirmm-00102783⟩

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