A Parallelized Way to Provide Data Encryption and Integrity Checking on a Processor-Memory Bus - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier
Conference Papers Year : 2006

A Parallelized Way to Provide Data Encryption and Integrity Checking on a Processor-Memory Bus

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Micro and nanotechnologies/Microelectronics

Christine Carvalho De Matos  : Connect in order to contact the contributor

https://hal-lirmm.ccsd.cnrs.fr/lirmm-00102783

Submitted on : Monday, October 2, 2006-4:17:27 PM

Last modification on : Friday, March 24, 2023-2:52:48 PM

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lirmm-00102783 , version 1 (02-10-2006)

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  • HAL Id : lirmm-00102783 , version 1

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Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, Michel Bardouillet, et al.. A Parallelized Way to Provide Data Encryption and Integrity Checking on a Processor-Memory Bus. DAC: Design Automation Conference, Jul 2006, San Francisco, CA, United States. ⟨lirmm-00102783⟩

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