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Poster communications

Dynamic Hardware Multiplexing for Coarse Grain Reconfigurable Architectures

Pascal Benoit 1 Gilles Sassatelli 1 Lionel Torres 1 Michel Robert 1 Gaston Cambon 2 
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
2 LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Document type :
Poster communications
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00105959
Contributor : Christine Carvalho De Matos Connect in order to contact the contributor
Submitted on : Friday, October 13, 2006 - 10:22:10 AM
Last modification on : Friday, August 5, 2022 - 10:47:52 AM

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  • HAL Id : lirmm-00105959, version 1

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CNRS | SYSMIC | LIRMM | LIRMM_MIC | MIC | MIPS | UNIV-MONTPELLIER

Citation

Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon. Dynamic Hardware Multiplexing for Coarse Grain Reconfigurable Architectures. FPGA'05: ACM/SIGDA 9th International Symposium on Field Programmable Gate Arrays, Feb 2005, Monterey, CA, United States. ACM Press, 2005. ⟨lirmm-00105959⟩

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