Emergent technologies such as magnetic tunneling junction (MTJ), used in MRAM design are compatible with CMOS conventional processes and can be used in configurable circuits. This type of memory seems to be interesting for programmable applications in order to limit configuration time and power consumption required at each power up of the device. FPGA configuration memory is distributed all over the device and each point has to be readable independently from each other, that is why the approach is different from the classical memory array one. In this paper a first FPGA architecture based on MTJ-SRAM cells is described.