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Defect-Aware SOC Test Scheduling

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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00108846
Contributor : Christine Carvalho de Matos <>
Submitted on : Monday, October 23, 2006 - 12:56:58 PM
Last modification on : Thursday, May 24, 2018 - 3:59:20 PM

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  • HAL Id : lirmm-00108846, version 1

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E. Larsson, Jean Pouget, Z. Peng. Defect-Aware SOC Test Scheduling. VTS'04: 22nd IEEE VLSI Test Symposium, Apr 2004, Napa Valley, CA (USA), pp.359-364. ⟨lirmm-00108846⟩

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