A Novel DFT Technique to Test a Complete Set of ADC's and DAC's Embedded in a Complex SiP - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Journal Articles IEEE Design & Test of Computers Year : 2006

A Novel DFT Technique to Test a Complete Set of ADC's and DAC's Embedded in a Complex SiP

Abstract

This paper proposes an original Design-For-Test (DFT) technique allowing the test of a complete set of converters embedded in a complex System-in-Package. The fundamental idea consists in implementing an additional circuitry allowing to interconnect the analogue ouputs of DAC's with the analogue inputs of ADC's. This globally results in an Analogue Network of interconnected Converters (ANC) that can be tested in a fully digital way. It is demonstrated that different configurations of the network can be described through a system of linearly independent equations. Solving the system of equations allows to determine the harmonic contribution of every converter in the network
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Dates and versions

lirmm-00115131 , version 1 (20-11-2006)

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Cite

Serge Bernard, Vincent Kerzérho, Philippe Cauvet, Florence Azaïs, Mariane Comte, et al.. A Novel DFT Technique to Test a Complete Set of ADC's and DAC's Embedded in a Complex SiP. IEEE Design & Test of Computers, 2006, 23 (3), pp.237-243. ⟨10.1109/MDT.2006.59⟩. ⟨lirmm-00115131⟩
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