Multi-Mode Operator for SHA-2 Hash Functions

Abstract : We propose an improved implementation of the SHA-2 hash family, with minimal operator latency and reduced hardware requirements. We also propose a high frequency version at the cost of only two cycles of latency per message. Finally we present a multi-mode architecture able to perform either a SHA-384 or SHA-512 hash or to behave as two independant SHA-224 or SHA-256 operators. Such capability adds increased flexibility for applications ranging from a server running multiple streams to independent pseudorandom number generation. We also demonstrate that our architecture achieves a performance comparable to separate implementations while requiring much less hardware.
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Article dans une revue
Journal of Systems Architecture, Elsevier, 2007, Special Issue on Embedded Hardware for Cryptosystems, 52 (2-3), pp.127-138. 〈10.1016/j.sysarc.2006.09.006〉
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00126262
Contributeur : Laurent Imbert <>
Soumis le : mardi 19 juin 2007 - 13:54:33
Dernière modification le : mardi 11 décembre 2018 - 17:16:02
Document(s) archivé(s) le : mercredi 7 avril 2010 - 02:30:11

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Ryan Glabb, Laurent Imbert, Graham Jullien, Arnaud Tisserand, Nicolas Veyrat-Charvillon. Multi-Mode Operator for SHA-2 Hash Functions. Journal of Systems Architecture, Elsevier, 2007, Special Issue on Embedded Hardware for Cryptosystems, 52 (2-3), pp.127-138. 〈10.1016/j.sysarc.2006.09.006〉. 〈lirmm-00126262〉

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