Electro-Thermal Short Pulsed Simulation for SOI Technology

Abstract : This work investigates the determination of thermal boundary conditions for electro-thermal simulations in case of short duration stressing event for SOI devices. An analysis of the heat flow inside the structure is given showing an important thermal role of contacts in deep submicron SOI devices. These boundary conditions are applied to ISE simulations of a partially depleted 130nm SOI diode during an ESD event and a good matching with TLP experimental results has been obtained.
Type de document :
Article dans une revue
Microelectronics Reliability, Elsevier, 2006, 46 (9-11), pp.1482-1485. 〈10.1016/j.microrel.2006.07.015〉
Liste complète des métadonnées

https://hal-lirmm.ccsd.cnrs.fr/lirmm-00128255
Contributeur : Pascal Nouet <>
Soumis le : mercredi 31 janvier 2007 - 14:18:55
Dernière modification le : jeudi 24 mai 2018 - 15:59:24

Identifiants

Collections

Citation

Christophe Entringer, Philippe Flatresse, Philippe Galy, Florence Azaïs, Pascal Nouet. Electro-Thermal Short Pulsed Simulation for SOI Technology. Microelectronics Reliability, Elsevier, 2006, 46 (9-11), pp.1482-1485. 〈10.1016/j.microrel.2006.07.015〉. 〈lirmm-00128255〉

Partager

Métriques

Consultations de la notice

137