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Request-Skip Adders: CMOS Standard Cell Data Dependent Adders

Robin Perrot 1 Nadine Azemard 2 Philippe Maurine 2
1 LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
2 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : Asynchronous CMOS data dependent adders are introduced in this paper. The proposed architectures result from modifications of classical structures of addition. These modifications, although simple, allow a significant reduction of the average latency of these operators without modifying the datapaths nor degrading the area requirement. In order to validate the suggested architecture, operators have been designed with a standard CMOS technology (0.35μm) for various timing constraints. The design spaces obtained have thereafter been compared to their synchronous counterparts.
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00130195
Contributor : Martine Peridier <>
Submitted on : Friday, February 9, 2007 - 5:04:02 PM
Last modification on : Friday, September 13, 2019 - 11:47:35 AM

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CNRS | SYSMIC | LIRMM | LIRMM_MIC | MIC | MIPS | UNIV-MONTPELLIER

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Robin Perrot, Nadine Azemard, Philippe Maurine. Request-Skip Adders: CMOS Standard Cell Data Dependent Adders. ICECS: International Conference on Electronics, Circuits and Systems, Dec 2006, Nice, France. pp.510-513, ⟨10.1109/ICECS.2006.379837⟩. ⟨lirmm-00130195⟩

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