Skip to Main content Skip to Navigation
Conference papers

A secure Scan Design Methodology

David Hély 1 Frédéric Bancel 1 Marie-Lise Flottes 2 Bruno Rouzeyre 2 
2 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : It has been proven that scan path is a potent hazard for secure chips. Scan based attacks have been recently demonstrated against DES or AES and several solutions have been presented in the literature in order to securize the scan chain. Nevertheless, the different proposed techniques are all ad hoc techniques, which are not always easy to integrate into a completely automated design flow or in an IP reuse environment. In this paper, we propose a scan chain integrity detection mechanism, which respects both automated design flow and IP reuse environment.
Complete list of metadata

Cited literature [2 references]  Display  Hide  Download
Contributor : Christine Carvalho De Matos Connect in order to contact the contributor
Submitted on : Sunday, October 6, 2019 - 11:38:19 AM
Last modification on : Friday, August 5, 2022 - 10:48:21 AM


Publisher files allowed on an open archive




David Hély, Frédéric Bancel, Marie-Lise Flottes, Bruno Rouzeyre. A secure Scan Design Methodology. DATE: Design, Automation and Test in Europe, Mar 2006, Munich, Germany. pp.1177-1178, ⟨10.1109/DATE.2006.244019⟩. ⟨lirmm-00132516⟩



Record views


Files downloads