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Automating the IEEE std. 1500 Compliance Verification for Embedded Cores

Alfredo Benso 1 Stefano Di Carlo 1 Paolo Prinetto 1 Alberto Bosio 2 
2 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : The IEEE 1500 Standard for Embedded Core Testing proposes a very effective solution for testing modern System-On-Chip (SoC) by proposing a flexible hardware test wrapper architecture for embedded cores, together with a Core Test Language (CTL) used to describe the implemented wrapper functionalities. Already several IP providers have announced compliance in both existing and future design blocks. In this paper we address the challenge of guaranteeing the compliance of a wrapper architecture and its CTL description to the IEEE std. 1500. This is a mandatory step to fully trust the wrapper functionalities in applying the test sequences to the core. The proposed solution aims at implementing a verification framework allowing core providers and/or integrators to automatically verify the compliancy of their products (sold or purchased) to the standard.
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Contributor : Alberto Bosio Connect in order to contact the contributor
Submitted on : Friday, November 16, 2007 - 8:20:50 AM
Last modification on : Friday, August 5, 2022 - 10:48:00 AM


  • HAL Id : lirmm-00188209, version 1



Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Alberto Bosio. Automating the IEEE std. 1500 Compliance Verification for Embedded Cores. IEEE International High Level Design Validation and Test Workshop, Nov 2007, Irvine, CA, USA, pp.171-177. ⟨lirmm-00188209⟩



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