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Journal articles
Fully Digital Test Solution for a Set of ADCs and DACs embedded in a SiP or SoC
Abstract : The trend towards highly integrated electronic devices leads to the growth of the System-in-Package (SiP) and System-on-Chip (SoC) technologies, where data converters play a major role in the interface between the real analogue world and the digital processing. Testing these converters with accuracy and at a low cost represents a big challenge, because the observability and controllability of these blocks is reduced and the test operation requires a lot of time and expensive analogue instruments. The purpose of this paper is to present a new Design-for-Test (DFT) technique called “Analogue Network of Converters”. This technique aims at testing a set of Analogue-to-Digital Converters (ADC) and Digital-to-Analogue Converters (DAC) in a fully digital setup (using a low cost digital tester). The proposed method relies on a novel processing of the harmonic distortion generated by the converters and requires an extremely simple additional circuitry and interconnects.
Cited literature [14 references]
https://hal-lirmm.ccsd.cnrs.fr/lirmm-00195172
Contributor : Serge Bernard <>
Submitted on : Monday, December 10, 2007 - 10:45:30 AM
Last modification on : Tuesday, January 5, 2021 - 4:00:05 PM
Long-term archiving on: : Monday, April 12, 2010 - 6:42:47 AM
Contributor : Serge Bernard <>
Submitted on : Monday, December 10, 2007 - 10:45:30 AM
Last modification on : Tuesday, January 5, 2021 - 4:00:05 PM
Long-term archiving on: : Monday, April 12, 2010 - 6:42:47 AM