Timing Performance Representation of a CMOS Standard Cell Library

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Communication dans un congrès
DCIS: Design of Circuits and Integrated Systems, Nov 2003, Ciudad Real, Spain. 18th International Conference on Design of Circuits and Integrated Systems, pp.83-88, 2003
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00239460
Contributeur : Nadine Azemard <>
Soumis le : mardi 5 février 2008 - 18:08:55
Dernière modification le : mercredi 17 octobre 2018 - 17:20:02

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  • HAL Id : lirmm-00239460, version 1

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Benoit Lasbouygues, J. Schindler, Sylvain Engels, Philippe Maurine, Xavier Michel, et al.. Timing Performance Representation of a CMOS Standard Cell Library. DCIS: Design of Circuits and Integrated Systems, Nov 2003, Ciudad Real, Spain. 18th International Conference on Design of Circuits and Integrated Systems, pp.83-88, 2003. 〈lirmm-00239460〉

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