Low Voltage Testing of Gate Oxide Short in CMOS Technology - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier
Conference Papers Year : 2002

Low Voltage Testing of Gate Oxide Short in CMOS Technology

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Micro and nanotechnologies/Microelectronics

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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00268526

Submitted on : Tuesday, April 1, 2008-9:27:39 AM

Last modification on : Friday, March 24, 2023-2:52:50 PM

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lirmm-00268526 , version 1 (01-04-2008)

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  • HAL Id : lirmm-00268526 , version 1

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Michel Renovell, Jean-Marc J.-M. Galliere, Florence Azaïs, Yves Bertrand. Low Voltage Testing of Gate Oxide Short in CMOS Technology. DDECS: Design and Diagnostics of Electronic Circuits and Systems, 2002, Brno, Czech Republic. pp.168-174. ⟨lirmm-00268526⟩

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